How to Design Mission Critical FPGA Systems

Thu. November 1| 2:00 PM - 2:45 PM | 208B

Conference: ESC Minneapolis 2018

Track: ESC Track A: Embedded Hardware Design & Verification

Format: 45-Minute

Pass Type: Conference Pass (Paid)

System on Chip technology is now at the core of systems, and many of the applications in which these systems are deployed are demanding, where failure could result in the loss of life or failure of the mission. This session will look at techniques that can be used when creating mission critical designs.

The challenges faced by the creators of functionally safe systems will be presented with a special focus on tool chain certification, component selection, common cause failure detection, and environmental considerations. We will also explain some of the standards we must meet as system designers.

Looking more into techniques for the development of mission critical FPGAs, this session will look at different elements of the development flow which should be considered for the concept, architecture, implementation, and validation of a design. Examples of this include the optimal use of architectural characteristics of devices, as well as an overview on support software & IP Cores. We will also look at how we can take advantage of error correcting codes to protect memories, device configurations, and communication channels.

Speakers

Adam Taylor

Adam Taylor

Director

Adiuvo Engineering Training ltd

Role: Speaker