CANCELED - Everything You Wanted to Know About ASICs, But Were Afraidto Ask

Wed. October 31| 8:00 AM - 10:00 AM | 208C

Conference: ESC Minneapolis 2018

Track: ESC Track A: Embedded Hardware Design & Verification

Format: 2-hour

Pass Type: Conference Pass (Paid)

When most design engineers envision an embedded system, it will most likely be in the form of a PCB comprising an FPGA and/or processor, SRAM, NVM, and a bunch of interface chips. And, indeed for low-volume applications where size and power is not that important, it may be the most cost-effective solution.

But for advanced applications or anything running on battery power, the combination of size, active power, stand-by power, and performance of your solution will be key elements for success of your product. A single chip (ASIC) whether or not on a small board comprising some additional passives/power devices could be the ideal solution.

This session will give an overview of the flow from idea to qualified packaged ASICs. Examples based on different complexity and technology options are given for cost estimations. The Do's and Don'ts for first time users, etc.

Level: N/A